High Level Synthesis Acceleration of MTTKRP (MSc Thesis)

Overview

My MSc thesis at Bilkent University focused on accelerating the Matricised Tensor Times Khatri-Rao Product (MTTKRP) — a core operation in tensor factorisation — using High Level Synthesis (HLS) targeting FPGA hardware.

What I Did

• Implemented and optimised MTTKRP kernels in C for HLS compilation targeting FPGA.
• Investigated parallelism and memory access patterns to maximise throughput on FPGA architectures.
• Evaluated performance improvements over CPU-based baselines.

Thesis

Available in the Bilkent University repository.

GPA: 3.87/4.0